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An implementation of a parallel ray tracing algorithm on hybrid parallel architecture

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3 Author(s)
Chang-Geun Kwon ; Sch. of Electron. & Electr. Eng., Kyungpook Nat. Univ., Taegu, South Korea ; Hyo-Kyung Sung ; Heung-Moon Choi

We present a parallel ray tracing algorithm on hybrid parallel architecture with processor a farm model to speed up the ray tracing. The hybrid parallel architecture, a hybrid of a tightly- and a loosely-coupled one, is used in which reconfiguration for local and virtual shared memory is made through a crossbar network with a local and global bus. The proposed architecture enhances the overall performance of the parallel ray tracing by reducing the data communication time between the processors in dynamic load balancing while maintaining data coherency. The proposed algorithm is implemented on the TMS320C80, an MVP (multimedia video processor), which has one master processor and four slave processors. The experimental results show that the proposed algorithm gives almost a linear speedup for parallel ray tracing of a complex image

Published in:

Acoustics, Speech and Signal Processing, 1998. Proceedings of the 1998 IEEE International Conference on  (Volume:3 )

Date of Conference:

12-15 May 1998