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The current-voltage characteristics of a classical field-effect transistor (FET) is dictated by thermal injection of charge carriers over a gate-controlled energy barrier. It is well known that the subthreshold swing (S) associated with these transistors cannot be reduced below the Boltzmann limit of 60 mV/decade, which in turn defines the lower limit of power dissipation. Therefore, a number of groups have recently proposed to use negative capacitance (NC) gate insulators in FETs to reduce S below the Boltzmann limit. The ferroelectric-FET (FE-FET) and suspended-gate FET (SG-FET) are two examples. It is now well accepted that NC-FETs can lower S, but given a specific device architecture, the question of whether there is a lower limit of S (and if so, the conditions that define the limit) has not been answered. In this paper, we: 1) demonstrate that the fundamental constraints of stability and hysteresis-free operation dictate that there is a lower limit of S associated with each NC-FET technology; 2) provide a general algorithm to calculate the minimum subthreshold swing (Smin); and 3) illustrate the concept using SG-FET and FE-FET for two different channel configurations, namely, a bulk FET and an FET with constant channel capacitance. Our results broaden the understanding of field-effect action in NC-FETs and should inform research on these devices.