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Optimization for thermal and electrical wiring for a flip-chip package using physical-neural network modeling

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2 Author(s)
Calmidi, V.V. ; Dept. of Mech. Eng., Colorado Univ., Boulder, CO, USA ; Mahajan, R.L.

It is shown in this paper that artificial neural networks (ANNs) offer an attractive approach to finding a global optimum for both thermal and electrical wiring performance in electronic packages. The variables used for the optimization are internal thermal resistance, and electrical wiring both of which are expressed as functions of size and number of vias. First, the thermal calculations are performed by solving the steady heat conduction equation in a three-dimensional (3-D) domain. The temperature profiles and chip-to-case thermal resistances are obtained for different number and sizes of thermal vias. This thermal data set is used to “train” an ANN model. Our “simple to complex” and simultaneous testing and training procedure is used to develop an appropriate network with best predictive capabilities. Then, an algebraic expression for the electrical wiring density on the chip is derived as a function of the via number and size for a simple wiring layout. Using this expression along with the ANN model for the thermal resistance, we illustrate an efficient optimization method. The approach is general and is easily extendible to other more complex situations

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Components, Packaging, and Manufacturing Technology, Part C, IEEE Transactions on  (Volume:21 ,  Issue: 2 )