Fabrication and Charge Transport Modeling of Thin-Film Transistor Based on Carbon Nanotubes Network

In this paper, the fabrication and modeling of thin-film transistors (TFTs) based on random network of single-walled carbon nanotubes (SWCNTs) are presented. The thin film is obtained by dispersing 99% semiconductive SWCNTs with an effective deposition technique at room temperature that combines vacuum filtration and silanization of substrate. The case of TFT structures with channel length varying from 2 to 50 μm is experimentally studied. In the device with channel length equal to 8 μm, an apparent mobility of 40.75 cm
²
/V·s, a current density of 0.06 μm, and I
_ON
/IO
_FF
ratio of 1.8 × 10
⁴
have been measured. In order to obtain a numerical model as close as possible to the real structure, a 3-D model for the thin-film layer is developed, rather than the 2-D type commonly used in the literature, to reproduce the electric transport properties of the CNTs network in the channel of TFTs devices. The spatial arrangement of the random network CNTs in the channel of the thin-film structure is also analyzed by considering the percolation theory. According to this theory, an exponent of the power law equal to α = 1.7 is experimentally detected, indicating that the devices operate close to the percolation region. A good agreement is found between the transport characteristics of the simulated and fabricated devices. The adopted model opens new routes to understand the transport properties of the film. The proposed fabrication approach can be easily transformed to large areas leading to a suitable use in industrial application.