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Integrating HDL synthesis and partitioning for multi-FPGA designs

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2 Author(s)
Wen-Jong Fang ; Tsinghua Univ., Beijing, China ; A. C. -H. Wu

The authors examine the interaction of HDL synthesis and multi-FPGA partitioning on designs with varying structural characteristics and HDL coding styles. They demonstrate that an integrated synthesis and partitioning methodology is crucial to achieving high-density designs

Published in:

IEEE Design & Test of Computers  (Volume:15 ,  Issue: 2 )