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Zero-aliasing space compaction of test responses using multiple parity signatures

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2 Author(s)
Chakrabarty, K. ; Dept. of Electr. & Comput. Eng., Boston Univ., MA, USA ; Hayes, J.P.

We present a parity-based space compaction technique that eliminates aliasing for any given fault model. The test responses from a circuit under test with a large number of primary outputs are merged into a narrow signature stream using a multiple-output parity tree. The functions realized by the different outputs of the compactor are determined by a procedure that targets the desired fault model. Experimental results for the ISCAS-85 benchmarks show that zero aliasing of single stuck-line faults can be achieved with a two output parity tree compactor. Our findings corroborate recent results on the fundamental limits of space compaction.

Published in:

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on  (Volume:6 ,  Issue: 2 )