Practical accuracy analysis of some existing effective channel length and series resistance extraction methods for MOSFET's

A method to analyze the accuracy of the extracted values for the channel length (L/sub eff/) and series resistance (R/sub s/) of MOSFET devices is presented. The analysis is based on a statistical argument being the variance /spl sigma/ of the extracted results. This variance is found to be a good measure for the accuracy of the particular extraction method used. It is shown that, in the case of deep submicron technologies, errors as large as 200 nm for /spl Delta/L can be made for these extraction methods depending on the process design and the process control. The use of a single transistor method is suggested as a possible solution to the low accuracy of the L-array methods.