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Associative architecture for fast DCT

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3 Author(s)
Shain, Y. ; Associative Comput. Ltd., Raanan, Israel ; Akerib, A. ; Adar, R.

This paper discusses an associative processor architecture designed to meet the demands of real-time image processing applications. In a single chip, this architecture provides thousands of processors-one for each pixel, in the form of associative memory. This paper focuses on a generic, proprietary associative processor architecture and discusses implementing the discrete cosine transform (DCT) using processors based on this architecture. Associative Computing Ltd. has developed a commercial associative chip based on this architecture, and while the DCT implementation discussed refers to future generations based on this architecture, reference is made throughout to the company's present processor. Processors based on our associative architecture can process the large amounts of data typically required in real-time imaging applications at a lower cost-performance ratio than conventional processors. The scalable nature of memory-based processor architecture allows developers to rapidly increase processing power without altering the fundamental processor, or system architecture. The underlying technologies used in the company's present processor can significantly facilitate the development of associative processing as an alternative to conventional processing for video applications including compression and video editing

Published in:

Acoustics, Speech and Signal Processing, 1998. Proceedings of the 1998 IEEE International Conference on  (Volume:5 )

Date of Conference:

12-15 May 1998