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Circuit improvements for high-speed domino logic: for the Manchester carry chain

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1 Author(s)
G. M. Blair ; Dept. of Electr. Eng., Edinburgh Univ., UK

Circuit techniques are introduced to reduce the delay of pass-transistor chains within the domino-logic implementation of a Manchester carry chain: the quadratic dependency on the number of bits is made linear without increasing transistor sizes

Published in:

Electronics Letters  (Volume:34 ,  Issue: 3 )