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Technology scaling is leading to supply voltage reduction and shrinking voltage headroom, making it very challenging for analog circuits to achieve high signal-to-noise-and-distortion ratios (SNDRs). For example, at Vdd ≤ 0.6V, the peak signal swing is 30% of Vdd in -. Since timing accuracy is improving in nanoscale CMOS, techniques have been proposed representing analog information in the time or phase domain. However, the linearity of the transformation between time or phase domain and the voltage or current domain remains a bottleneck at low supply voltages. In , ring-oscillator based integrators replace conventional OTA-based integrators, but the output signal swing is still limited to 30% of Vdd by the voltage headroom of the charge pump, which performs phase-to-voltage conversion. We propose switched-mode signal processing where analog information is represented in terms of pulse widths at the amplifier output stage, which can be replaced with power-efficient rail-to-rail class-D stages, thus producing switched-mode operational amplifiers (SMOAs). We present a 0.6V 70MHz 4th-order continuous-time Butterworth filter designed with SMOAs that achieves a dynamic range of 58dB, an SNR of 55.8dB and a THD of 60dB at +2.8dBm output signal power, while dissipating 26.2mW.