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Compact charge-based 4 bit flash ADC circuit architecture for ANN applications

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3 Author(s)
A. Schmid ; Integrated Syst. Center, Fed. Inst. of Technol., Lausanne, Switzerland ; Y. Leblebici ; D. Mlynek

A charge based flash analogue-digital converter (ADC) circuit architecture is presented, which can be used in various artificial neural network (ANN) applications where compactness and high conversion speed are critical. The 4 bit ADC has been realised with an 0.8 μm double-poly process, and tested to confirm its linearity over the full range and a conversion speed of 10 Msamples/s

Published in:

Electronics Letters  (Volume:34 ,  Issue: 8 )