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FPGA implementation for 2D discrete wavelet transform

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4 Author(s)
King-Chu Hung ; Dept. of Electron. Eng., I-Shou Univ., Taiwan, China ; Yu-Jung Huang ; Trieu-Kien Truong ; Chia-Ming Wang

An operator correlation-based algorithm and its VLSI architecture For computing the 2D discrete wavelet transform is presented. The proposed discrete wavelet transform architecture was simulated in Verilog and synthesised with the FPGA compiler. The implementation for the 2D discrete wavelet transform on an FPGA-based design style is described

Published in:

Electronics Letters  (Volume:34 ,  Issue: 7 )