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Systolic array implementation of block LMS algorithm

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3 Author(s)
Yoshida, T. ; Dept. of Commun. Eng., Osaka Univ., Japan ; Liguni, Y. ; Maeda, H.

The authors derive the systolic array implementation of the block LMS algorithm, consisting of N processing elements, where N is the filter order. The resulting array attains an order-independent sampling rate. Computer simulation results show that the block LMS algorithm is faster than the delayed LMS algorithm, which has previously been implemented on systolic arrays

Published in:

Electronics Letters  (Volume:34 ,  Issue: 7 )

Date of Publication:

2 Apr 1998

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