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Multiple-valued logic-in-memory VLSI based on a floating-gate-MOS pass-transistor network

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3 Author(s)
T. Hanyu ; Tohoku Univ., Sendai, Japan ; K. Teranishi ; M. Kameyama

A logic-in-memory structure, in which storage functions are distributed over a logic-circuit plane, is a solution to the communication bottleneck between memory and logic modules, one of the most serious problems in recent deep submicron VLSI systems technology. This logic-in-memory VLSI based on floating-gate MOS transistors merges storage and switching functions in a multiple-valued-input and binary-output combinational logic circuit that is useful for the realization of parallel arithmetic and logic circuits. The paper presents a general structure of a 4-valued-input and binary-output combinational logic circuit. It has two kinds of inputs, external and stored constant inputs. In the logic-in-memory VLSI, a large number of stored data are distributed in not only word-parallel but also in digit parallel manners.

Published in:

Solid-State Circuits Conference, 1998. Digest of Technical Papers. 1998 IEEE International

Date of Conference:

5-7 Feb. 1998