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High-current small-parasitic-capacitance MOSFET on a poly-Si interlayered (PSI:Ψ) SOI wafer

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4 Author(s)
M. Horiuchi ; Central Res. Lab., Hitachi Ltd., Tokyo, Japan ; T. Teshima ; K. Tokumasu ; K. Yamaguchi

A new type of silicon-on insulator (SOI) structure has been fabricated by using direct bonding technology to bury multilayered films consisting of poly-Si and SiO2. A device with an ideal epitaxial channel structure was fabricated using a conventional MOS process on this novel multilayered SOI (100-nm SOI/10-nm SiO2/poly-Si/500-nm SiO2) wafer. In this device, the highly concentrated p+ poly-Si just beneath the nMOS channel region acts as a punchthrough stopper, and the buried thin backgate oxide under the SOI layer acts as an impurity diffusion barrier, keeping the impurity concentration in the SOI film at its original low level. The device fabricated was an ultrathin SOI MOSFET capable of operating at a current 1.5 times that of conventional hundred-nm devices at low voltages

Published in:

IEEE Transactions on Electron Devices  (Volume:45 ,  Issue: 5 )