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This paper extends the formulations presented in an earlier paper on intermodulation distortion (IMD), to include the important aspect of memory effects in power amplifiers (PAs). They are intended for the estimation of linearity requirements for circuit blocks typically found in the error signal paths of envelope feedback amplifiers in the context of computer-aided design and test of Radio Frequency Integrated Circuit (RFIC) PAs. A system of nonlinear equations for computing IMD levels is derived and an algorithm is given in the Appendix. They facilitate implementation within a computer-aided IMD test setup based on the methodology presented in the earlier paper.