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A novel parallel architecture for a switched-capacitor bandpass sigma-delta modulator

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3 Author(s)
E. N. Farag ; Waterloo Univ., Ont., Canada ; Ran-Hong Yan ; M. I. Elmasry

In this paper, we apply parallelism by 4× of analog signal processors to the design of a bandpass sigma-delta modulator. We show that the overall speed of the modulator is increased without increasing the speed requirement of the individual building blocks. Several architectures are considered in terms of their resilience to implementation details such as mismatch and gain errors. A switched capacitor circuit is also presented for the proposed modulator

Published in:

Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on  (Volume:1 )

Date of Conference:

3-6 Aug 1997