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SOI for digital CMOS VLSI: design considerations and advances

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3 Author(s)
Ching-Te Chuang ; IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA ; Pong-Fe Lu ; C. J. Anderson

This paper reviews the recent advances of silicon-on-insulator (SOI) technology for complementary metal-oxide-semiconductor (CMOS) very-large-scale-integration memory and logic applications. Static random access memories (SRAMs), dynamic random access memories (DRAMs), and digital CMOS logic circuits are considered. Particular emphases are placed on the design issues and advantages resulting from the unique SOI device structure. The impact of floating-body in partially depleted devices on the circuit operation, stability, and functionality are addressed. The use of smart-body contact to improve the power and delay performance is discussed, as are global design issues

Published in:

Proceedings of the IEEE  (Volume:86 ,  Issue: 4 )