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A pipelined 16-state generalized Viterbi detector

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2 Author(s)
Carley, L.R. ; Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA ; Sridharan, S.

An architecture for efficiently implementing linear and nonlinear generalized Viterbi detectors is presented. Its principle novelty is the use of a pipelined look-up table that stores the squared difference between every possible input level and every noiseless level. An implementation example is presented for the case of a 16-state Viterbi detector handling any noiseless target of up to 5 adjacent non-zero values. In addition, auxiliary circuits to generate the error between the input and the noiseless target value (needed to implement adaption of noiseless target values and equalizer coefficients, timing recovery, automatic gain control and DC offset cancellation) are presented

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Magnetics, IEEE Transactions on  (Volume:34 ,  Issue: 1 )