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Practical MTR-FDTS (τ=2) read channel for the >200 Mbit/sec Era

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3 Author(s)
Kovacs, J. ; Analog Devices Inc., Wilmington, MA, USA ; Byrne, J. ; Kenney, J.

This paper presents an architecture for a fixed-delay tree search with feedback (FDTS/DF) channel which uses a maximum transition run-length code. The critical timing path in this new detector is comparable to that of a decision feedback detector. The forward filter consists of a first-order all-pass filter cascaded with a fourth-order Bessel filter. Timing and gain recovery are also discussed

Published in:

Magnetics, IEEE Transactions on  (Volume:34 ,  Issue: 1 )

Date of Publication:

Jan 1998

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