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Design and benchmarking of BCPMOS versus SCPMOS for an evolutionary 0.25-μm CMOS technology

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8 Author(s)
Vuong, H.H. ; Lucent Technol., AT&T Bell Labs., Murray Hill, NJ, USA ; Eshraghi, S.A. ; Rafferty, C.S. ; Hillenius, S.J.
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TCAD tools were used to design and benchmark 0.25-μm buried-channel PMOS (BCPMOS) versus surface-channel PMOS (SCPMOS), for both device and circuit performance. With optimized device designs, BCPMOS gives smaller gate delays than SCPMOS for INVERTER and NAND gates with supply voltages VDD>1.4 V, and for NOR gates with V DD>2.4 V

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Electron Devices, IEEE Transactions on  (Volume:45 ,  Issue: 4 )