By Topic

Simultaneous code execution and data storage in a single flash memory chip for real time wireless communication systems

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Brown, C. ; Intel Corp., Folsom, CA, USA ; Hasbun, R.

A cost-effective, flexible approach to emulating electrically erasable programmable read only memory (EEPROM) in flash memory is presented. New low latency suspend/resume circuitry combined with flash media management software is introduced to enable simultaneous code and data storage; thus eliminating system EEPROM memory, reducing system data write time, and lowering memory system cost and power consumption. This new method eliminates the need for specialized hardware circuits in flash memory that are required to simultaneously read code, while writing or erasing data from an independent address partition. Flash data integrator (FDI) media management software architecture is presented for data storage in a GSM cellular phone application, and is shown to offer a more flexible solution than a specialized hardware approach

Published in:

Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on  (Volume:2 )

Date of Conference:

3-6 Aug 1997