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Effects of Fin Width on Device Performance and Reliability of Double-Gate n-Type FinFETs

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8 Author(s)
Cheng-Li Lin ; Dept. of Electron. Eng., Feng Chia Univ., Taichung, Taiwan ; Po-Hsiu Hsiao ; Wen-Kuan Yeh ; Han-Wen Liu
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This paper investigates the impact of fin width ( Wfins = 15, 20, and 25 nm) in a double-gate n-type FinFET on the performance and reliability of the device. Carrier conduction in the Si-fin body of FinFETs with various Wfins is also studied. The experimental results show that the threshold voltage and drain current of n-type FinFETs increases and decreases, respectively, as Wfin is reduced. A thinner Wfin FinFET exhibits greater immunity to short channel effects. In addition, according to the analysis results of low-frequency noise, the thinnest Wfin FinFET possesses the largest bulk oxide trap density (NBOT) than that of a thicker Wfin FinFET. Moreover, the noise of the thinnest Wfin (15 nm) FinFET is largely dominated by the fluctuation of carrier number. In the hot-carrier injection (HCI) reliability test, the thinnest Wfin FinFET shows less performance degradation than those of the thicker ones. However, by removing the effect of the parasitic source/drain resistance, we believe that the volume inversion charged carriers flow through the entire thin Si-fin having a lower surface roughness and Coulomb scattering than those of thicker ones, which results in a higher carrier temperature and worsening of the reliability of the HCI.

Published in:

Electron Devices, IEEE Transactions on  (Volume:60 ,  Issue: 11 )

Date of Publication:

Nov. 2013

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