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A 25 Ms/s 8-b-10 Ms/s 10-b CMOS data acquisition IC for digital storage oscilloscopes

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6 Author(s)
Kusayanagi, N. ; Electron. Lab., Yokogawa Electr. Corp., Tokyo, Japan ; Choi, T. ; Hiwatashi, M. ; Segami, M.
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A data acquisition IC has been developed for digital storage oscilloscopes (DSOs). The entire DSO front-end except an input attenuator was integrated using 1-μm double-poly, double-metal (DPDM) CMOS process technology. In the analog-to-digital conversion, a time-interleaved successive approximation architecture effectively enables both 25 Ms/s 8-b and 10 Ms/s 10-b operation. The input signal conditioner consists of a variable gain amplifier (VGA) and a second-order programmable low-pass filter (LPF) using folded-cascode structures with current feedback circuits. The overall gain is externally controllable from 12 dB to 38 dB, and the bandwidth is programmable at 500 kHz, 5 MHz, and 25 MHz. The chip consumes 340 mW at the 25 Ms/s operating condition and less than 8 mW in the power-down mode from a single 5 V supply

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Solid-State Circuits, IEEE Journal of  (Volume:33 ,  Issue: 3 )