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Variable supply-voltage scheme for low-power high-speed CMOS digital design

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12 Author(s)
Kuroda, T. ; Syst. ULSI Eng. Lab., Toshiba Corp., Kawasaki, Japan ; Suzuki, K. ; Mita, S. ; Fujita, T.
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This paper describes a variable supply-voltage (VS) scheme. From an external supply, the VS scheme automatically generates minimum internal supply voltages by feedback control of a buck converter, a speed detector, and a timing controller so that they meet the demand on its operation frequency. A 32-b RISC core processor is developed in a 0.4-μm CMOS technology which optimally controls the internal supple voltages with the VS scheme and the threshold voltages through substrate bias control. Performance in MIPS/W is improved by a factor of more than two compared with its conventional CMOS design

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:33 ,  Issue: 3 )

Date of Publication:

Mar 1998

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