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A 1.6-GHz CMOS PLL with on-chip loop filter

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2 Author(s)
Parker, J.F. ; Level One Commun. Inc., Sacramento, CA, USA ; Ray, D.

A 1.6-GHz phase locked loop (PLL) has been fabricated in a 0.6-μm CMOS technology. The PLL consists of an LC-tank circuit, divider, phase detector with charge pump, and an on-chip passive loop filter. When the oscillator is open loop, it exhibits -115 dBc/Hz phase noise at a 600-kHz offset from the carrier. The PLL occupies an active area of 1.6 mm2 and dissipates 90 mW from a single 3-V supply

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:33 ,  Issue: 3 )

Date of Publication:

Mar 1998

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