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Transistor operation of 30-nm gate-length EJ-MOSFETs

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7 Author(s)
H. Hawaura ; NEC Fundamental Res. Labs., Ibaraki, Japan ; T. Sakamoto ; T. Baba ; Y. Ochiai
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We have fabricated electrically variable shallow junction metal-oxide-silicon field-effect transistors (EJ-MOSFET's) to investigate transistor characteristics of ultrafine-gate MOSFET's. By using EB direct writing onto an ultrahigh-resolution negative resist (calixarene), we achieved a gate length of 32 nm for the first time. The short-channel effects were effectively suppressed by electrically induced ultrashallow source/drain regions, and the fabricated device exhibited normal transistor characteristics even in the 32-nm gate-length regime at room temperature: an ON/OFF current ratio of 105 and a cut-off current of 20 pA/μm.

Published in:

IEEE Electron Device Letters  (Volume:19 ,  Issue: 3 )