By Topic

Data-driven self-timed RSFQ high-speed test system

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Deng, Z.J. ; Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA ; Yoshikawa, N. ; Whiteley, S.R. ; Van Duzer, T.

Functional testing of rapid single-flux-quantum (RSFQ) logic circuits at high speed is necessary to further optimize circuit design, but it is not easy to do off-chip testing because of the high speed and small amplitude of SFQ pulses. This paper will present the design and test results of an 20 Gb/s bit-by-bit on-chip high-speed digital test system based on data-driven self-timed (DDST) circuits.

Published in:

Applied Superconductivity, IEEE Transactions on  (Volume:7 ,  Issue: 4 )