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Process integration of 3D Si interposer with double-sided active chip attachments

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19 Author(s)
Pei-Jer Tzeng ; Electronics and Optoelectronics Research Labs (EOL), Industrial Technology Research Institute (ITRI), Rm. 256, Bldg. 17, No. 195, Sec. 4, Chung-Hsing Road, Chutung, Hsinchu 310, Taiwan ; John H. Lau ; Chau-Jie Zhan ; Yu-Chen Hsin
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A double-sided Si passive interposer connecting active dies on both sides for a 3D IC integration is investigated. This interposer is 100μm-thick with 10μm-diameter TSVs (through silicon vias), 3 RDLs (redistribution layer) on its front-side, 2 RDLs on its backside. It supports 2 active dies on its frontside and 1 active die at its backside. The present study focuses on the process integration of the passive interposer, double-sided chip assembly process, and passive electrical characterization.

Published in:

2013 IEEE 63rd Electronic Components and Technology Conference

Date of Conference:

28-31 May 2013