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Reliability evaluation of a CoWoS-enabled 3D IC package

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10 Author(s)

TSV (Through Silicon Via)-based interposer has been proposed as a multi-die package solution to meet the rapidly increasing demand in inter-component (e.g. CPU, GPU and DRAM) communication bandwidth in an electronic system. The stacked-silicon die package configuration may give rise to package reliability concerns not observed in conventional monolithic flip-chip packages. 3D finite element method (FEM) was used to study the thermo-mechanical response of the interposer-based package during thermal cycle reliability stressing. Fatigue failures of the C4 and BGA joints are the two primary reliability focuses in the present study. Experimental data collected on the CoWoS™-enabled test vehicles were used to validate the FEM models. Parametric study of key package material and geometric parameters was performed to analyze their effects on C4 bump thermal cycle reliability. Package materials of interest include UF (underfill), lid and substrate, and the geometric parameters include lid thickness and C4 bump scheme. The results showed that the CoWoS package using AlSiC lid has better C4 bump life than the CoWoS package using Cu lid, and when the Tg of the underfill of C4 bump is higher, the C4 bump has better reliability. Furthermore, 3D thermo-mechanical and reliability study of BGA balls is presented for organic and ceramic substrates. Several DOEs have been constructed for ceramic substrate to increase BGA reliability by optimizing C4 underfill material and package design. The effect of board layer count and design is detailed. Finally reliability of BGA balls, C4 and micro-bumps are compared for a part that is mounted on a PCB board.

Published in:

Electronic Components and Technology Conference (ECTC), 2013 IEEE 63rd

Date of Conference:

28-31 May 2013