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Performance and side-channel attack analysis of a self synchronous montgomery multiplier processing element for RSA in 40nm CMOS

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6 Author(s)
Devlin, B. ; Dept. of Electron. Eng., Univ. of Tokyo, Tokyo, Japan ; Ueki, H. ; Mori, S. ; Miyauchi, S.
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We propose a Montgomery multiplier composed of gate-level self synchronous processing elements (SS-PE) that can be used to create scalable-length modular multipliers with no broadcast signals for high throughput. A 40nm test circuit shows the SS-PE operates from 0.4V to 1.3V at 20°C without tuning, with 2.1 Gb/s data-throughput, 476ps delay at 1.1V, and energy per operation of 322fJ/op at 1.1V and 1.40fJ/op with voltage scaling to 0.4V. A 8-bit RSA is implemented using SS-PEs, and shows 186Mb/s and 130ns data-throughput and time respectively for the average case of decryption. Side-channel attacks using simple power analysis, differential power analysis, and high order differential power analysis show secure operation with no information leakage after 50,000 measurements.

Published in:

Solid State Circuits Conference (A-SSCC), 2012 IEEE Asian

Date of Conference:

12-14 Nov. 2012

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