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ECL-CMOS and CMOS-ECL interface in 1.2-μm CMOS for 150-MHz digital ECL data transmission systems

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4 Author(s)
M. S. J. Steyaert ; ESAT-MICAS, Katholieke Univ. Leuven, Heverlee, Belgium ; W. Bijker ; P. Vorenkamp ; J. Sevenhans

The design of a full-CMOS circuit that converts voltage signals from those used for emitter-coupled logic (ECL) to CMOS and vice versa, for use in digital data transmissions with clock frequencies up to 150 MHz, is described. Extremely high performances are obtained due to a novel circuit principle, in both the ECL-to-CMOS convertor and the CMOS-to-ECL convertor. A wideband CMOS amplifier used in the ECL-to-CMOS convertor, incorporating a current injection technique to increase the bandwidth of the circuit, is also presented. A circuit principle is presented to realize an extremely fast CMOS-to-ECL conversion, based on a current switching technique and charge injection to compensate the large output capacitance. Both circuits make use of replica biasing to ensure maximum switching speed in the ECL-to-CMOS convertor and correct ECL output levels in the CMOS-to-ECL convertor. An ECL-CMOS-ECL repeater has been designed in a 1.2-μm double-metal CMOS process

Published in:

IEEE Journal of Solid-State Circuits  (Volume:26 ,  Issue: 1 )