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A 0.5GHz–1.5GHz order scalable harmonic rejection mixer

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4 Author(s)
Teng Yang ; Dept. of Electr. Eng., Columbia Univ., New York, NY, USA ; Tripurari, K. ; Krishnaswamy, H. ; Kinget, P.R.

In this paper, a harmonic rejection mixer architecture capable of operating for a wide range of LO frequencies is demonstrated. The mixer can be configured to suppress any particular harmonic of the LO or multiple harmonics simultaneously. The level of suppression of each harmonic is controlled by a set of independent gain and phase tuning parameters. Feasibility of extension of this concept to higher order harmonics is also demonstrated. A proof-of-principle prototype has been designed and fabricated in a 45nm SOI technology. Experimental results demonstrate an operation range of 0.5GHz to 1.5GHz for the LO frequency while offering harmonic rejection better than 55dB for the 3rd harmonic and 58dB for the 5th harmonic across LO frequencies. The mixer consumes 17mW of power from a 1V power supply while occupying an area of 0.352mm2.

Published in:

Radio Frequency Integrated Circuits Symposium (RFIC), 2013 IEEE

Date of Conference:

2-4 June 2013

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