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A DC-9.5GHz noise-canceling distributed LNA in 65nm CMOS

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3 Author(s)
Jianxun Zhu ; Columbia Univ., New York, NY, USA ; Krishnaswamy, H. ; Kinget, P.R.

Summary form only given. A low noise amplifier is presented that uniquely achieves wide-band input matching and good low-frequency noise performance at the same time. Its topology is a hybrid of distributed amplifier and a common-source common-gate noise-canceling amplifier. The proof-of-principle prototype in 65nm CMOS operates from DC up to 9.5GHz with more than 12dB gain, achieves a minimum noise figure of 2.8dB, P1dB of -7dBm, IIP3 of +4dBm, consumes 18mW from a 1.4V power supply and occupies a total active area of 0.4mm2.

Published in:

Radio Frequency Integrated Circuits Symposium (RFIC), 2013 IEEE

Date of Conference:

2-4 June 2013

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