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Formal design of an asynchronous DSP counterflow pipeline: a case study in handshake algebra

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4 Author(s)
Josephs, M.B. ; Centre for Concurrent Syst., South Bank Univ., London, UK ; Lucassen, P.G. ; Udding, J.T. ; Verhoeff, T.

Two recent developments in asynchronous circuit design are explored by means of a case study (polynomial division) in digital signal processing. The first development is a new formal method, the handshake algebra of M.B. Josephs, J.T. Udding and J.T. Yantchev (1993), that is suitable for specifying, deriving, and verifying circuits that follow a handshaking protocol. The second development is an architecture, counterflow pipelines, that R.F. Sproull (1994) has recently suggested, which is attractive to implement asynchronously

Published in:

Advanced Research in Asynchronous Circuits and Systems, 1994., Proceedings of the International Symposium on

Date of Conference:

3-5 Nov 1994