Cart (Loading....) | Create Account
Close category search window
 

Verification of the speed-independent circuits by STG unfoldings

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Kondratyev, A. ; Dept. of Comput. Hardware, Aizu Univ., Fukushima, Japan ; Taubin, A.

In this paper we show how to analyze an arbitrary STG for the speed-independence property. The idea of analysis is based on the STG unfolding into an acyclic graph. The improved method of unfolding is suggested, in which the size of the obtained description is always less (or equal in the case of a fully sequential process) than the size of a corresponding state graph. Based on this method the verification algorithms of STG analysis are developed. These algorithms are polynomial from the size of STG unfolding. Their efficiency is considered on the set of benchmarks

Published in:

Advanced Research in Asynchronous Circuits and Systems, 1994., Proceedings of the International Symposium on

Date of Conference:

3-5 Nov 1994

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.