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Timing-reliability evaluation of asynchronous circuits based on different delay models

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2 Author(s)
M. Kuwako ; Dept. of Comput. Sci., Tokyo Inst. of Technol., Japan ; T. Nanya

We propose a quantitative measure for evaluating the timing-reliability of asynchronous circuits designed on a variety of delay model. Using the measure, we evaluate the timing-reliability, as well as the speed performance and hardware cost, for various building blocks of asynchronous systems. Finally, we give a guideline for choosing valid delay models for the design of dependable asynchronous processors

Published in:

Advanced Research in Asynchronous Circuits and Systems, 1994., Proceedings of the International Symposium on

Date of Conference:

3-5 Nov 1994