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Design verification of the cache-coherent shared-memory system

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4 Author(s)
Fong Pong ; Hewlett-Packard Lab., Palo Alto, CA. ; Browne, M. ; Nowatzyk, A. ; Dubois, M.

This paper describes the methods used to formulate and validate the memory subsystem of the cache-coherent Sun Scalable Shared-memory MultiProcessor ( at three levels of abstraction: the memory consistency model, the cache coherence protocol, and the implementation

Published in:

Computers, IEEE Transactions on  (Volume:47 ,  Issue: 1 )

Date of Publication:

Jan 1998

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