By Topic

Electrical Test Structure for the Measurement of Hermeticity in Electronic and MEMS Packages With Small Cavity Volumes

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

6 Author(s)

The design, fabrication, and characterization of a piezoresistive membrane deflection test structure for the electrical evaluation of hermeticity in low cavity volume packages is discussed. This test structure uses the zero-level silicon cap as a deflecting membrane to electrically monitor changes in package cavity pressure over time. The hermeticity of the package can then be determined in real-time and low leak rates can be measured using a pressurization stage, which also accelerates the test. The minimum detectable leak rate of the test structure without acceleration has been measured at 6.9× 10-12 atm·cm3·s-1, which is two orders of magnitude lower than the limit of a traditional helium fine leak test.

Published in:

IEEE Transactions on Semiconductor Manufacturing  (Volume:26 ,  Issue: 3 )