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Impact of two-step-recessed gate structure on RF performance of InP-based HEMTs

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5 Author(s)
T. Suemitsu ; NTT Syst. Electron. Labs., Kanagawa, Japan ; T. Enoki ; H. Yokoyama ; Y. Umeda
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The RF performance of InP-based lattice-matched high electron mobility transistors (HEMTs) is improved by using a two-step-recess process. 0.07 μm gate HEMTs show a cutoff frequency (fτ) of 300 GHz, a value previously achievable only with a gate length of 0.05 μm in the conventional gate structure, and a maximum frequency of oscillation fmax of 400 GHz. The high f τ indicates that the effective gate length is successfully suppressed by the two-step-recessed gate structure. Moreover, owing to the selective etching property, this gate recess process provides high uniformity of the threshold voltage and the cutoff frequency of the HEMTs on a 3-in wafer

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Electronics Letters  (Volume:34 ,  Issue: 2 )