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A 0.38 V near/sub-VT digitally controlled low-dropout regulator with enhanced power supply noise rejection in 90 nm CMOS process

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2 Author(s)
Kim, Y. ; Department of Electrical and Computer Engineering, Texas A&M University, College Station, TX 77843, USA ; Li, P.

This study describes a 0.38 V digitally controlled low-dropout (LDO) voltage regulator enabling dynamic voltage scaling (DVS) for near/sub-threshold applications. For operating at an ultra-low supply voltage, analogue components are replaced in conventional LDOs with digital counterparts. Especially, a digital reference control that is based on a replica circuit is proposed to improve power supply noise rejection and line regulation of the LDO. The proposed LDO has been designed in a 90 nm regular VT complementary metal oxide semiconductor technology. The LDO can regulate the output voltage from 0.12 to 0.32 V with a supply voltage of 0.38 V. Furthermore, it reaches the current efficiency of 99.3% and the power efficiency of 83.6%, respectively, at a load current of 1 mA. The digitally controllable DVS with 3 mV resolution is achieved.

Published in:

Circuits, Devices & Systems, IET  (Volume:7 ,  Issue: 1 )