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As CMOS devices scale to the very deep submicron (VDSM) regime they become more susceptible to transient faults such as memory bit flips due to alpha particles as well as permanent faults due to manufacturing issues. As the transition is made to emerging nanotechnologies, such as carbon nanotube transistors, the reliability of the electronic components will increasingly become a critical concern. One important solution is to borrow an idea from communication theory and use error correcting codes to improve performance. The interconnect or logic circuitry are analogous to a noisy communication channel. The use of error correcting codes (ECCs) has the potential to improve the computational capacity of the nanoscale circuitry and wires. This paper will survey the field of proposed solutions for use of ECCs in the area of interconnect and logic circuits. Discussion of the current state-of-the-art approaches is provided and some suggestions for future work for making ECCs a viable method of improving the performance of nanoelectronic systems is given.