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Engineering Nanowire n-MOSFETs at L_{g}< 8~{\rm nm}

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6 Author(s)
Mehrotra, S.R. ; Dept. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA ; SungGeun Kim ; Kubis, T. ; Povolotskyi, M.
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As metal-oxide-semiconductor field-effect transistors (MOSFETs) channel lengths (Lg) are scaled to lengths shorter than Lg <; 8 nm source-drain tunneling starts to become a major performance limiting factor. In this scenario, a heavier transport mass can be used to limit source-drain (S-D) tunneling. Taking InAs and Si as examples, it is shown that different heavier transport masses can be engineered using strain and crystal-orientation engineering. Full-band extended device atomistic quantum transport simulations are performed for nanowire MOSFETs at Lg <; 8 nm in both ballistic and incoherent scattering regimes. In conclusion, a heavier transport mass can indeed be advantageous in improving ON-state currents in ultrascaled nanowire MOSFETs.

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Electron Devices, IEEE Transactions on  (Volume:60 ,  Issue: 7 )