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A full section overhead processing chip set for 10 Gbit/s SDH-based optical fiber transmission system

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3 Author(s)
Tae-Hee Lee ; Electron. & Telecommun. Res. Inst., Taejon, South Korea ; Jae-Il Cho ; Jeong-Hoon Ko

A full section overhead (SOH) processing chip set has been designed for use in a 10 Gbit/s SDH-based optical fiber transmission system. The chip set has been fabricated in a 0.6 μm CMOS and GaAs gate array technology. The features supported by the chip set include STM-64 SOH insertion and extraction including regenerator section trace (RST), frame alignment word insertion and detection, 32-bit parallel scrambling and descrambling, 8:1 multiplexing and demultiplexing, alarm detection and generation, and performance monitoring. This paper introduces a novel multiplexing and demultiplexing structure for a parallel processing of the STM-64 signal using the chip set. This paper also describes the architecture of the chip set, and several of the chip set's more interesting features

Published in:

Information, Communications and Signal Processing, 1997. ICICS., Proceedings of 1997 International Conference on

Date of Conference:

9-12 Sep 1997