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A novel approach to the design of multijunction solar cells on silicon substrates for 1-sun applications is described. Models for device simulation, including porous silicon layers, are presented. A silicon bottom subcell is formed by diffusion of dopants into a silicon wafer. The top of the wafer is porosified to create a compliant layer, and a III-V buffer layer is then grown epitaxially, followed by middle and top subcells. Because of the resistivity of the porous material, these designs are best suited to high-efficiency 1-sun applications. Numerical simulations of a multijunction solar cell that incorporates a porous silicon-compliant membrane indicate an efficiency of 30.7% under AM1.5G, 1-sun for low-threading dislocation density, decreasing to 23.7% for a TDD of 107 cm-2.