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Design and evaluation of fine-grain-mode transition method based on dynamic memory access analysing for variable stages pipeline processor

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5 Author(s)
Takahiro Sasaki ; Graduate School of Engineering, Faculty of Engineering, Mie University, 1577 Kurimamachiya-Cho, Tsu City, Mie 514-8507, Japan ; Tomoyuki Nakabayashi ; Kazumasa Nomura ; Kazuhiko Ohno
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This study proposes a fine-grain-mode transition method for variable stages pipeline (VSP) processor. The method is based on dynamic memory access analysing and it reduces energy consumption. A VSP processor varies the pipeline depth dynamically according to workload. When the workload is heavy, the processor shifts into a high-speed mode that drives a deep pipeline at a high clock frequency. When the workload is light, the processor shifts into a low-energy mode that unifies pipeline stages to make the pipeline shallower and drives it at a low clock frequency. The conventional mode transition method cannot follow sharp workload changes because it takes a long time to predict workload. The fine-grain pipeline depth control, this study proposes, is based on a high-speed workload prediction mechanism using memory access frequency, and it uses a novel method to conceal the overhead because of changing the pipeline depth. Simulation results show that the authors approach can reduce the energy-delay product 10% below what it would be with the conventional approach.

Published in:

IET Computers & Digital Techniques  (Volume:7 ,  Issue: 1 )