By Topic

A Distributive-Transconductance Model for Border Traps in III–V/High-k MOS Capacitors

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Chen Zhang ; Electr. & Comput. Eng. Dept., Univ. of Illinois, Urbana, IL, USA ; Min Xu ; Ye, P.D. ; Xiuling Li

By in-depth analysis of the electrical response of border traps in gate oxide, a new border-trap model is proposed where the ac charging and discharging current associated with those traps is proportional to the variation of the surface potential of semiconductors, resembling the behavior of transconductors. In contrast, the border trap current is directly related to the local potential in the gate oxide in the existing model. The model is then used to provide a qualitative understanding of the temperature-dependent frequency dispersion observed on the Al2O3/n-GaAs(111)A MOS capacitors at high positive bias.

Published in:

Electron Device Letters, IEEE  (Volume:34 ,  Issue: 6 )