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Analysis and Design of a 5 GS/s Analog Charge-Domain FFT for an SDR Front-End in 65 nm CMOS

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4 Author(s)
Bodhisatwa Sadhu ; University of Minnesota, Minneapolis ; Martin Sturm ; Brian M. Sadler ; Ramesh Harjani

This work describes the design of a 16 point analog domain FFT using a Charge Re-use Analog Fourier Transform (CRAFT) engine. The circuit relies on charge re-use to achieve 47 dB average output SNDR on an instantaneous input bandwidth of 5 GHz, and consumes only 3.8 mW (12.2 pJ/conv.). The CRAFT engine is used as a wide-band, low power RF front-end channelizer for software defined radio (SDR) applications. The paper also discusses the handling of circuit non-idealities for the CRAFT design: their significance, modeling, and circuit techniques for their mitigation. These techniques enable this implementation to achieve a large dynamic range even at high speeds.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:48 ,  Issue: 5 )