Referenced Items are not available for this document.
We report on a simple technique for fabricating a Sn nanocrystal array in thin SiO/sub 2/ film. This technique uses low energy ion implantation followed by thermal annealing. Isolated Sn nanocrystals 5 nm in diameter are formed in an array with excellent size and position uniformity. Barrier height between a Sn nanocrystal and the substrate was obtained by measuring the temperature and frequency dependence of the capacitance of the diode structure. Single electron charging effects of the Sn nanocrystals were observed from current-voltage characteristics.
Published in:
Electron Devices Meeting, 1997. IEDM '97. Technical Digest., International
Date of Conference: 10-10 Dec. 1997
- Page(s):
- 159 - 162
- Meeting Date :
- 07 Dec 1997-10 Dec 1997
- ISSN :
- 0163-1918
- Print ISBN:
- 0-7803-4100-7
- INSPEC Accession Number:
- 5802188
- Conference Location :
- Washington, DC, USA
- Digital Object Identifier :
- 10.1109/IEDM.1997.650291
- Product Type:
- Conference Publications
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