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A /spl Sigma/ /spl Delta/-FIR-DAC for Multi-Bit /spl Sigma/ /spl Delta/ Modulators

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2 Author(s)
Pakniat, H. ; Dept. of Electr. Eng., Amirkabir Univ. of Technol., Tehran, Iran ; Yavari, M.

In this paper, a new digital-to-analog converter (DAC) is proposed for multi-bit continuous-time sigma-delta modulators (ΣΔMs). This -finite-impulse-response-DAC (ΣΔ-FIR-DAC) digitally converts the multi-bit output of the quantizer to a 1.5-bit signal at a higher rate and then injects it to the modulator loop filter by using a 1.5-bit DAC. An FIR filter is merged into 1.5-bit DAC to improve the clock jitter insensitivity. Furthermore, a new implementation of ΣΔ-FIR-DAC is presented to reduce the output rate of ΣΔ-FIR-DAC down to the original rate of the modulator. This reduced rate ΣΔ-FIR-DAC (RR-ΣΔ-FIR-DAC) can be used in both continuous-time and discrete-time ΣΔMs. Theoretical analysis supported by simulation results are provided to evaluate the performance, clock jitter immunity and robustness against DAC elements mismatch in the proposed modulators.

Published in:

Circuits and Systems I: Regular Papers, IEEE Transactions on  (Volume:60 ,  Issue: 9 )